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1 for more information www.linear.com/lt3045-1 typical application features description 20v, 500ma, ultralow noise, ultrahigh psrr linear regulator with vioc control the lt ? 3045-1 is a high performance low dropout linear regulator featuring ltc s ultralow noise and ultrahigh psrr architecture for powering noise sensitive applications. de - signed as a precision current reference followed by a high performance voltage buffer , the lt3045-1 can be easily paralleled to further reduce noise, increase output current and spread heat on the pcb. in addition to the lt3045 feature set, the lt3045-1 incorporates a vioc tracking function to control an upstream switching converter to maintain a constant voltage across the lt3045-1 and hence minimize power dissipation. the device supplies 500ma at a typical 260mv dropout voltage. operating quiescent current is nominally 2.3ma and drops to <<1a in shutdown. the lt3045-1s wide output voltage range (0v to 15v) while maintaining unity- gain operation provides virtually constant output noise, psrr, bandwidth and load regulation, independent of the programmed output voltage. additionally, the regulator features programmable current limit, fast start-up capa - bility and programmable power good to indicate output voltage regulation. the lt3045 -1 is stable with a minimum 10f ceramic output capacitor. built-in protection includes reverse- battery protection, reverse-current protection, internal current limit with foldback and thermal limit with hysteresis. the lt3045 -1 is available in thermally enhanced 12-lead msop and 3mm 3mm dfn packages. noise spectral density applications n ultralow rms noise: 0.8v rms (10hz to 100khz) n ultralow spot noise: 2nv/hz at 10khz n ultrahigh psrr: 76db at 1mhz n output current: 500ma n wide input voltage range: 1.8v to 20v n single capacitor improves noise and psrr n 100a set pin current: 1% initial accuracy n vioc pin controls upstream regulator to minimize power dissipation n single resistor programs output voltage n programmable current limit n low dropout voltage: 260mv n output voltage range: 0v to 15v n programmable power good n fast start-up capability n precision enable/uvlo n parallelable for lower noise and higher current n internal current limit with foldback n minimum output capacitor: 10f ceramic n reverse-battery and reverse-current protection n 12-lead msop and 3mm 3mm dfn packages n rf power supplies: plls, vcos, mixers, lnas, pas n very low noise instrumentation n high speed/high precision data converters n medical applications: imaging, diagnostics n post-regulator for switching supplies l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of analog devices, inc. patents pending. all other trademarks are the property of their respective owners. + ? 100a in en/uv pgfb vioc gnd out lt3045-1 ilim pg 10f 47f v in 12v 4.7f v out : variable i out(max) : 500ma 30451 ta01a 249 set outs lt8608 bst sw pg fb in en/uv tr/ss mode r t intv cc 7.68k 40.2k 2.2h 2.21k gnd 10nf 1f 0.22f f sw = 1mhz l: xfl4020-222mec v ldoin ? v ldout = 1v lt3045-1 30451fa 100 1k 10k 100k 1m 10m 0.01 0.1 1 10 ldo in = 4.3v 100 1000 noise (v/ hz ) 30451 ta01b ldo out = 3.3v i load = 500ma ldo out ldo in noise floor frequency (hz) 10
2 for more information www.linear.com/lt3045-1 pin configuration absolute maximum ratings in pin voltage ......................................................... 22v v ioc pin voltage (note 10) .............................. C 0. 3v , 4v en/uv pin voltage .................................................. 2 2v in-to-en/uv differential .......................................... 22v pg pin voltage (note 10) ............................... C 0. 3v , 22v ilim pin voltage (note 10) ............................... C 0. 3v , 1v pgfb pin voltage (note 10) ........................... C 0.3 v , 22v set pin voltage (note 10) .............................. C 0. 3v , 16v set pin current (note 7) .................................... 20 ma outs pin voltage (note 10) ........................... C 0. 3v , 16v outs pin current (note 7) ................................. 20 ma (note 1) top view dd package 12-lead (3mm 3mm) plastic dfn 12 11 8 9 10 4 5 3 2 1 out out outs gnd set pgfb in in vioc en/uv pg ilim 6 7 13 gnd t jmax = 150c, e ja = 34c/w, e jc = 5.5c/w exposed pad (pin 13) is gnd, must be soldered to pcb 1 2 3 4 5 6 in in vioc en/uv pg ilim 12 11 10 9 8 7 out out outs gnd set pgfb top view mse package 12-lead plastic msop 13 gnd t jmax = 150c, e ja = 33c/w, e jc = 8c/w exposed pad (pin 13) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt3045edd-1#pbf lt3045edd-1#trpbf lhbr 12-lead (3mm = 3mm) plastic dfn C40c to 125c lt3045idd-1#pbf lt3045idd-1#trpbf lhbr 12-lead (3mm = 3mm) plastic dfn C40c to 125c lt3045emse-1#pbf lt3045emse-1#trpbf 30451 12-lead plastic msop C40c to 125c lt3045imse-1#pbf lt3045imse-1#trpbf 30451 12-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. lt3045 options part number vioc function lt3045-1 yes lt3045 no out pin voltage (note 10) ............................. C 0.3 v , 16v out-to-outs differential (note 14) ....................... 1. 2v in-to-out differential ............................................. 2 2v in-to-outs differential ........................................... 22v o utput short-circuit duration .......................... in definite operating junction temperature range (note 9) e-grade, i-grade ............................... C 40 c to 125 c storage temperature range .................. C 65 c to 150 c lead temperature (soldering, 10 sec) ms e package ................................................... 30 0 c http://www.linear.com/product/lt3045-1#orderinfo lt3045-1 30451fa
3 for more information www.linear.com/lt3045-1 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. parameter conditions min typ max units input voltage range l 2 20 v minimum in pin voltage (note 2) i load = 500ma, v in uvlo rising v in uvlo hysteresis l 1.78 75 2 v mv output v oltage range v in > v out l 0 15 v set pin current (i set ) v in = 2v, i load = 1ma, v out = 1.3v 2v < v in < 20v, 0v < v out < 15v, 1ma < i load < 500ma (note 3) l 99 98 100 100 101 102 a a fast start-up set pin current v pgfb = 289mv, v in = 2.8v, v set = 1.3v 2 ma output offset voltage v os (v out C v set ) (note 4) v in = 2v, i load = 1ma, v out = 1.3v 2v < v in < 20v, 0v < v out < 15v, 1ma < i load < 500ma (note 3) l C1 C2 1 2 mv mv line regulation : ?i set line regulation: ?v os v in = 2v to 20v, i load = 1ma, v out = 1.3v v in = 2v to 20v, i load = 1ma, v out = 1.3v (note 4) l l 0.5 0.5 2 3 na/v v /v load regulation: ?i set load regulation: ?v os i load = 1ma to 500ma, v in = 2v, v out = 1.3v i load = 1ma to 500ma, v in = 2v, v out = 1.3v (note 4) l 3 0.1 0.5 na mv change in i set with v set change in v os with v set change in i set with v set change in v os with v set v set = 1.3v to 15v, v in = 20v, i load = 1ma v set = 1.3v to 15v, v in = 20v, i load = 1ma (note 4) v set = 0v to 1.3v, v in = 20v, i load = 1ma v set = 0v to 1.3v, v in = 20v, i load = 1ma (note 4) l l l l 30 0.03 150 0.3 400 0.6 600 2 na mv na mv dropout v oltage (note 5) i load = 1ma, 50ma l 220 275 330 mv mv i load = 300ma l 220 280 350 mv mv i load = 500ma l 260 350 450 mv mv gnd pin current v in = v out(nominal) (note 6) i load = 10a i load = 1ma i load = 50ma i load = 100ma i load = 500ma l l l l 2.2 2.4 3.5 4.3 15 4 5.5 7 25 ma ma ma ma ma output noise spectral density (notes 4, 8) i load = 500ma, frequency = 10hz, c out = 10f, c set = 0.47f, v out = 3.3v i load = 500ma, frequency = 10hz, c out = 10f, c set = 4.7f, 1.3v v out 15v i load = 500ma, frequency = 10khz, c out = 10f, c set = 0.47f, 1.3v v out 15v i load = 500ma, frequency = 10khz, c out = 10f, c set = 0.47f, 0v v out < 1.3v 500 70 2 5 nv/ hz nv/ hz n v/ hz n v/ hz output rms noise (notes 4, 8) i load = 500ma, bw = 10hz to 100khz, c out = 10f, c set = 0.47f, v out = 3.3v i load = 500ma, bw = 10hz to 100khz, c out = 10f, c set = 4.7f, 1.3v v out 15v i load = 500ma, bw = 10hz to 100khz, c out = 10f, c set = 4.7f, 0v v out < 1.3v 2.5 0.8 1.8 v rms v rms v rms reference current rms output noise (notes 4, 8) bw = 10hz to 100khz 6 na rms ripple rejection 1.3v v out 15v v in C v out = 2v (avg) (notes 4, 8) v ripple = 500mv p-p , f ripple = 120hz, i load = 500ma, c out = 10f, c set = 4.7f v ripple = 150mv p-p , f ripple = 10khz, i load = 500ma, c out = 10f, c set = 0.47f v ripple = 150mv p-p , f ripple = 100khz, i load = 500ma, c out = 10f, c set = 0.47f v ripple = 150mv p-p , f ripple = 1mhz, i load = 500ma, c out = 10f, c set = 0.47f v ripple = 80mv p-p , f ripple = 10mhz, i load = 500ma, c out = 10f, c set = 0.47f 117 90 77 76 53 db db db db db ripple rejection 0v v out < 1.3v v in C v out = 2v (avg) (notes 4, 8) v ripple = 500mv p-p , f ripple = 120hz, i load = 500ma, c out = 10f, c set = 0.47f v ripple = 50mv p-p , f ripple = 10khz, i load = 500ma, c out = 10f, c set = 0.47f v ripple = 50mv p-p , f ripple = 100khz, i load = 500ma, c out = 10f, c set = 0.47f v ripple = 50mv p-p , f ripple = 1mhz, i load = 500ma, c out = 10f, c set = 0.47f v ripple = 50mv p-p , f ripple = 10mhz, i load = 500ma, c out = 10f, c set = 0.47f 104 85 72 64 54 db db db db db en/uv pin threshold en/uv trip point rising (t urn-on), v in = 2v l 1.18 1.24 1.32 v en/uv pin hysteresis en/uv trip point hysteresis, v in = 2v 130 mv lt3045-1 30451fa
4 for more information www.linear.com/lt3045-1 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. parameter conditions min typ max units en/uv pin current v en/uv = 0v, v in = 20v v en/uv = 1.24v, v in = 20v v en/uv = 20v, v in = 0v l l 0.03 8 1 15 a a a quiescent current in shutdown (v en/uv = 0v) v in = 6v l 0.3 1 10 a a internal current limit (note 12) v in = 2v, v out = 0v v in = 12v, v out = 0v v in = 20v, v out = 0v l l 570 230 710 700 330 850 430 ma ma ma programmable current limit programming scale factor : 2v < v in < 20v (note 11) v in = 2v, v out = 0v, r ilim = 300 v in = 2v, v out = 0v, r ilim = 1.5k l l 450 90 150 500 100 550 110 ma ? k ma ma pgfb trip point pgfb trip point rising l 291 300 309 mv pgfb hysteresis pgfb trip point hysteresis 7 mv pgfb pin current v in = 2v, v pgfb = 300mv 25 na pg output low voltage i pg = 100a l 30 100 mv pg leakage current v pg = 20v l 1 a reverse input current v in = C20v, v en/uv = 0v, v out = 0v, v set = 0v l 100 a reverse output current v in = 0, v out = 5v, set = open 14 25 a minimum load required (note 13) v out < 1v l 10 a thermal shutdown t j rising hysteresis 165 8 c c start-up time v out(nom) = 5v, i load = 500ma, c set = 0.47f, v in = 6v, v pgfb = 6v v out(nom) = 5v, i load = 500ma, c set = 4.7f, v in = 6v, v pgfb = 6v v out(nom) = 5v, i load = 500ma, c set = 4.7f, v in = 6v, r pg1 = 50k, r pg2 = 700k (with fast start-up to 90% of v out ) 55 550 10 ms ms ms thermal regulation 10ms pulse C0.01 %/w input-to-output differential v oltage control (vioc) (note 15) vioc amplifier gain 1 v/v vioc pin voltage range: v out ?>??v vioc + 0.5v l 1 4 v vioc pin voltage: v out ? 1.5v, v in ?=?2.5v 1 v vioc pin source current l 200 a vioc pin sink current: v in 2.5v l 15 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the en/uv pin threshold must be met to ensure device operation. note 3: maximum junction temperature limits operating conditions. the regulated output voltage specification does not apply for all possible combinations of input voltage and output current, especially due to the internal current limit foldback which starts to decrease current limit at v in C v out > 12v . if operating at maximum output current, limit the input voltage range. if operating at the maximum input voltage, limit the output current range. note 4: outs ties directly to out. note 5: dropout voltage is the minimum input-to-output differential voltage needed to maintain regulation at a specified output current. the dropout voltage is measured when output is 1% out of regulation. this definition results in a higher dropout voltage compared to hard dropout which is measured when v in = v out(nominal) . for lower output voltages, below 1.5v , dropout voltage is limited by the minimum input voltage specification. please consult the typical performance characteristics for curves of dropout voltage as a function of output load current and temperature measured in a typical application circuit. lt3045-1 30451fa
5 for more information www.linear.com/lt3045-1 electrical characteristics note 6: gnd pin current is tested with v in = v out(nominal) and a current source load. therefore, the device is tested while operating in dropout. this is the worst-case gnd pin current. gnd pin current decreases at higher input voltages. note that gnd pin current does not include set pin or ilim pin current but quiescent current does include them. note 7: set and outs pins are clamped using diodes and two 25 series resistors. for less than 5ms transients, this clamp circuitry can carry more than the rated current. refer to applications information for more information. note 8: adding a capacitor across the set pin resistor decreases output voltage noise. adding this capacitor bypasses the set pin resistors thermal noise as well as the reference currents noise. the output noise then equals the error amplifier noise. use of a set pin bypass capacitor also increases start-up time. note 9: the lt3045-1 is tested and specified under pulsed load conditions such that t j t a . the lt3045-1e is 100% tested at 25c and performance is guaranteed from 0c to 125c. specifications over the C40c to 125c operating temperature range are assured by design, characterization, and correlation with statistical process controls. the lt3045-1i is guaranteed over the full C40c to 125c operating temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 10: parasitic diodes exist internally between the vioc, ilim, pg, pgfb, set, outs, and out pins and the gnd pin. do not drive these pins more than 0.3v below the gnd pin during a fault condition. these pins must remain at a voltage more positive than gnd during normal operation. note 11: the current limit programming scale factor is specified while the internal backup current limit is not active. note that the internal current limit has foldback protection for v in C v out differentials greater than 12v. note 12: the internal back-up current limit circuitry incorporates foldback protection that decreases current limit for v in C v out > 12v . some level of output current is provided at all v in C v out differential voltages. consult the typical performance characteristics graph for current limit vs v in C v out . note 13: for output voltages less than 1v, the lt3045-1 requires a 10a minimum load current for stability. note 14: maximum out-to-outs differential is guaranteed by design. note 15: the vioc buffer outputs a voltage equal to v in C v out or v in ?C?1.5v (for v out ??1.5v). see block diagram and applications information for further information. the vioc pins source current should be set between 10a and 200a. lt3045-1 30451fa
6 for more information www.linear.com/lt3045-1 set pin current offset voltage (v out C v set ) load regulation typical performance characteristics offset voltage set pin current offset voltage (v out C v set ) set pin current set pin current offset voltage (v out C v set ) t j = 25c, unless otherwise noted. lt3045-1 30451fa 1.5 ?i set (na) ? v os (mv) 30451 g09 v in = 2v i l = 1ma v out = 1.3v temperature (c) ?75 ?50 ?25 3 0 25 50 75 100 125 150 99.0 99.2 99.4 4.5 99.6 99.8 100.0 100.2 100.4 100.6 100.8 101.0 set pin current (a) 30451 g01 6 n = 3250 i set distribution (a) 98 99 100 101 102 30451 g02 v in = 2v i l = 1ma 7.5 v out = 1.3v temperature (c) ?75 ?50 ?25 0 25 50 75 100 9 125 150 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 10.5 2.0 offset voltage (mv) 30451 g03 n = 3250 v os distribution (mv) ?2 ?1 0 1 2 12 30451 g04 i l = 1ma v out = 1.3v 150c 125c 25c ?55c input voltage (v) 0 2 13.5 4 6 8 10 12 14 16 18 20 99.0 15 99.2 99.4 99.6 99.8 100.0 100.2 100.4 100.6 100.8 101.0 i l = 1ma 99.0 set pin current (a) 30451 g05 i l = 1ma v out = 1.3v 150c 125c 25c ?55c input voltage (v) 0 99.2 2 4 6 8 10 12 14 16 18 20 99.4 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 offset voltage (mv) 99.6 30451 g06 99.8 100.0 100.2 100.4 100.6 100.8 v in = 20v 101.0 set pin current (a) 30451 g07 i l = 1ma v in = 20v 150c 125c 25c ?55c output voltage (v) 150c 0 1.5 3 4.5 6 7.5 9 10.5 12 13.5 125c 15 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 25c offset voltage (mv) 30451 g08 v in = 2.5v ?i l = 1ma to 500ma v out = 1.3v v os i set temperature (c) ?75 ?50 ?55c ?25 0 25 50 75 100 125 150 0 2 output voltage (v) 4 6 8 10 12 14 16 18 20 0 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20
7 for more information www.linear.com/lt3045-1 typical performance characteristics quiescent current typical dropout voltage dropout voltage quiescent current quiescent current quiescent current t j = 25c, unless otherwise noted. gnd pin current gnd pin current gnd pin current lt3045-1 30451fa 0 2.0 2.5 3.0 3.5 4.0 quiescent current (ma) 30451 g13 r set = 33.2k 150c 125c 25 25c ?55c output current (ma) 0 50 100 150 200 250 300 50 350 400 450 500 0 50 100 150 200 250 75 300 350 400 450 500 dropout voltage (mv) 30451 g14 r set = 33.2k i l = 500ma i l = 400ma 100 i l = 1ma temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 125 150 0 50 100 150 200 250 300 350 150 400 450 500 dropout voltage (mv) 30451 g15 v in = 5v r set = 33.2k i l = 500ma i l = 300ma i l = 100ma 0 i l = 1ma temperature (c) ?75 ?50 ?25 0 25 50 75 100 0.5 125 150 0 2 4 6 8 10 12 14 1.0 16 18 20 gnd pin current (ma) 30451 g16 v in = 4.3v r set v in = 2v 1.5 = 33.2k 150c 125c 25c ?55c output current (ma) 0 50 100 150 2.0 200 250 300 350 400 450 500 0 2 4 2.5 6 8 10 12 14 16 18 20 22 gnd pin current (ma) 3.0 30451 g17 r set = 33.2k r l = 6.6 r l = 11 r l = 33 r l = 330 r l = 3.3k input voltage (v) 0 1 3.5 2 3 4 5 6 7 8 9 10 0 4.0 2 4 6 8 10 12 14 16 18 gnd pin current (ma) quiescent current (ma) 30451 g18 30451 g10 v en/uv = 0v v in = 20v v en/uv = v in v in = 2v temperature (c) ?75 ?50 ?25 0 25 50 75 100 i l = 10a 125 150 0 5 10 15 20 25 30 35 r set = 13k 40 45 50 quiescent current (a) 30451 g11 v en/uv = v in i l = 10a r set = 33.2k i vioc = 10a input voltage (v) temperature (c) 0 2 4 6 8 10 12 14 16 18 ?75 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 ?50 quiescent current (ma) 30451 g12 v in = 6v v en/uv = v in i l = 10a 150c 125c 25c ?55c output voltage (v) ?25 0 2 4 1 3 5 0 0.5 1.0 1.5
8 for more information www.linear.com/lt3045-1 typical performance characteristics en/uv pin current en/uv pin current negative enable pin current minimum input voltage en/uv turn-on threshold en/uv pin hysteresis t j = 25c, unless otherwise noted. input pin current internal current limit internal current limit lt3045-1 30451fa 50 4.0 4.5 5.0 5.5 en/uv pin current (a) 30451 g22 v in = 20v v in = 2v enable pin voltage (v) 0 75 2 4 6 8 10 12 14 16 18 20 100 0 1 2 3 4 5 6 7 8 9 125 10 en/uv pin current (a) 30451 g23 v in = 2v 150c 125c 25c ?55c enable pin voltage (v) ?20 150 ?18 ?16 ?14 ?12 ?10 ?8 ?6 ?4 ?2 0 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0.25 0 en/uv pin current (a) 30451 g24 v in = 2v 150c 125c 25c ?55c enable pin voltage (v) ?20 0.50 ?18 ?16 ?14 ?12 ?10 ?8 ?6 ?4 ?2 0 0.75 0 0.1 0.2 0.3 input current (a) 30451 g25 r ilim = 0 v out = 0v v in = 2.5v v in = 12v 1.00 temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 rising uvlo 1.25 150 0 100 200 300 400 500 600 700 800 1.50 900 1000 current limit (ma) 30451 g26 v in = 20v r ilim = 0 v out = 0v temperature (c) ?75 ?50 1.75 ?25 0 25 50 75 100 125 150 0 100 2.00 200 300 400 500 600 current limit (ma) 30451 g27 input uvlo threshold (v) 30451 g19 v in = 2v v in = 10v temperature (c) ?75 falling uvlo ?50 ?25 0 25 50 75 100 125 150 1.18 temperature (c) 1.20 1.22 1.24 1.26 1.28 1.30 1.32 turn-on threshold (v) 30451 g20 v in = 2v ?75 v in = 10v temperature (c) ?75 ?50 ?25 0 25 50 75 100 ?50 125 150 50 65 80 95 110 125 140 155 ?25 170 185 200 en/uv pin hysteresis (mv) 30451 g21 v in = 20v 150c 125c 25c ?55c 0 enable pin voltage (v) 0 2 4 6 8 10 12 14 16 25 18 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
9 for more information www.linear.com/lt3045-1 typical performance characteristics ilim pin current pgfb rising threshold pgfb hysteresis internal current limit programmable current limit programmable current limit t j = 25c, unless otherwise noted. pg output low voltage pg pin leakage current i set during start-up with fast start-up enabled lt3045-1 30451fa 4 300 350 400 450 500 0 100 200 300 400 6 500 600 700 800 900 1000 ilim pin current (ua) 30451 g31 v in = 2v temperature (c) 8 ?75 ?50 ?25 0 25 50 75 100 125 150 10 290 292 294 296 298 300 302 304 306 308 12 310 pgfb rising threshold (mv) 30451 g32 v in = 2v temperature (c) ?75 ?50 ?25 0 25 14 50 75 100 125 150 0 1 2 3 4 16 5 6 7 8 pgfb hysteresis (mv) 30451 g33 v in = 2v v pgfb = 290mv i pg = 100a temperature (c) 18 ?75 ?50 ?25 0 25 50 75 100 125 150 20 0 5 10 15 20 25 30 35 40 45 0 50 v pg (mv) 30451 g34 v pg = 2v v pgfb = 310mv temperature (c) ?75 ?50 ?25 0 r ilim = 0 100 25 50 75 100 125 150 0 10 20 30 200 40 50 60 70 80 90 100 i pg (na) 30451 g35 v in = 2.5v 300 v pgfb = 290mv v set = 1.3v temperature (c) ?75 ?50 ?25 0 25 50 75 400 100 125 150 0 0.5 1.0 1.5 2.0 2.5 3.0 500 i set (ma) 30451 g36 600 700 800 900 1000 150c current limit (ma) 30451 g28 r ilim = 300 v out = 0v v in = 2.5v v in = 12v temperature (c) ?75 ?50 ?25 125c 0 25 50 75 100 125 150 0 100 200 25c 300 400 500 600 700 800 900 1000 current limit (ma) 30451 g29 ?55c r ilim = 1.5k v out = 0v v in = 2.5v v in = 12v temperature (c) ?75 ?50 ?25 0 25 input-to-output differential (v) 50 75 100 125 150 0 20 40 60 80 0 100 120 140 160 180 200 current limit (ma) 30451 g30 v ilim = 0v r set = 13k 2 2.5v in 5v in 10v in output current (ma) 0 50 100 150 200 250
10 for more information www.linear.com/lt3045-1 typical performance characteristics v out forced above v out(nominal) power supply ripple rejection power supply ripple rejection i set during start-up with fast start-up enabled output overshoot recovery current sink output overshoot recovery current sink t j = 25c, unless otherwise noted. i in when v en = 0v i out when v en = 0v i in when v en = v in i out when v en = v in power supply ripple rejection power supply ripple rejection as a function of error amplifier input pair power supply ripple rejection lt3045-1 30451fa 10 10 100 1k 10k 100k 1m 10m 20 30 40 12 50 60 70 80 90 100 110 120 psrr (db) 30451 g41 14 v in = 5v r set = 30.1k c set = 0.47f i l = 500ma c out = 10f c out = 22f frequency (hz) 10 100 1k 16 10k 100k 1m 10m 20 30 40 50 60 70 18 80 90 100 110 120 psrr (db) 30451 g42 v in = 5v r set = 30.1k c out = 10f 20 c set = 0.47f i l = 500ma i l = 300ma i l = 100ma i l = 50ma i l = 1ma frequency (hz) 10 100 1k 0 10k 100k 1m 10m 20 40 60 80 100 120 0.5 140 psrr (db) 30451 g43 v in = v out + 2v i l = 500ma c out = 10f c set = 0.47f v out 1.3v 0.6v < v out < 1.3v v out 0.6v 1.0 frequency (hz) 10 100 1k 10k 100k 1m 10m 20 30 1.5 40 50 60 70 80 90 100 110 120 psrr (db) v pgfb = 290mv 2.0 30451 g44 i l = 500ma r set = 30.1k c out = 10f c set = 0.47f 100khz 500khz 1mhz 2mhz input?to?output differential (v) 2.5 0 1 2 3 4 5 0 10 20 30 3.0 40 50 60 70 80 90 100 psrr (db) 30451 g45 3.5 i set (ma) 30451 g37 v in = 5v r set = 33.2k 150c 125c v set = 1.3v 25c ?55c v out ? v set (mv) 0 5 10 15 20 0 2 v in -to-v set differential (v) 4 6 8 10 12 output sink current (ma) 30451 g38 v in = 5v r set = 33.2k v out ? v set > 5mv 0 temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 2 150 0 1 2 3 4 5 6 7 output sink current (ma) 4 30451 g39 v in = 5v r set = 33.2k output voltage (v) 4 5 6 7 8 9 6 10 11 12 13 14 15 0 2 4 6 8 8 current (ma) 30451 g40 v in = 5v r set = 30.1k c out = 10f i l = 500ma c set = 4.7f c set = 0.47f frequency (hz)
11 for more information www.linear.com/lt3045-1 typical performance characteristics integrated rms output noise (10hz to 100khz) noise spectral density integrated rms output noise (10hz to 100khz) noise spectral density integrated rms output noise (10hz to 100khz) noise spectral density t j = 25c, unless otherwise noted. noise spectral density as a function of error amplifier input pair output noise: 10hz to 100khz load transient response lt3045-1 30451fa 150 1 10 100 1000 output noise (nv/hz) 30451 g49 v in = 5v r set = 33.2k c set = 4.7f i load = 500ma 200 c out = 10f c out = 22f frequency (hz) 10 100 1k 10k 100k 1m 10m 250 0.1 1 10 100 1000 output noise (nv/hz) 30451 g50 v in = 5v r set = 33.2k c set = 4.7f 300 c out = 10f i l = 500ma i l = 300ma i l = 100ma i l = 10ma i l = 1ma frequency (hz) 10 100 1k 350 10k 100k 1m 10m 0.1 1 10 100 1000 output noise (nv/hz) 400 30451 g51 v in = v out + 2v i l = 500ma c out = 10f c set = 4.7f v out 1.3v 0.6v < v out < 1.3v v out 0.6v frequency (hz) 10 450 100 1k 10k 100k 1m 10m 0.1 1 10 100 500 1000 output noise (nv/hz) 30451 g52 v in = 5v r set = 33.2k c out = 10f c set = 4.7f i l = 500ma 1ms/div 5v/div 0 30451 g53 v in = 5v r set = 33.2k c out = 10f c set = 0.47f load step = 10ma to 500ma 20s/div output current 500ma/div output voltage 20mv/div 30451 g54 0.2 v in = 5v 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 rms output noise (v rms ) r set = 33.2k 30451 g46 v in = 5v c out = 10f r set = 33.2k i load = 500ma set pin capacitance (f) 0.01 0.1 1 10 c out = 10f 100 0 1 2 3 4 5 6 7 8 c set = 4.7f 9 rms output noise (v rms ) 30451 g47 v in = v out + 2v c out = 10f c set = 4.7f i load = 500ma output voltage (v) 0 1.5 load current (ma) 3 4.5 6 7.5 9 10.5 12 13.5 15 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 50 rms output noise (v rms ) 30451 g48 v in = 5v r set = 33.2k c out = 10f i load = 500ma c set = 0.047f c set = 0.47f c set = 1f c set = 4.7f 100 c set = 22f frequency (hz) 10 100 1k 10k 100k 1m 10m 0.1
12 for more information www.linear.com/lt3045-1 typical performance characteristics start-up time with and without fast start-up circuitry for large c set input supply ramp-up and ramp-down line transient response t j = 25c, unless otherwise noted. vioc voltage vioc voltage v in = 4.3v v out = 3.3v i vioc = 100a i out = 1ma v in = 4.3v v out = 3.3v v vioc = 2v i out = 1ma 150c 125c 25c ?55c v in = 4.3v v out = 3.3v i out = 1ma 150c 125c 25c ?55c v in = 4.3v v out = 3.3v i vioc = 100a vioc voltage vioc sink current lt3045-1 30451fa 30451 g55 1.02 1.04 1.06 1.08 1.10 vioc voltage (v) 30451 g59 output load current (ma) 0 50 v in = 5v 100 150 200 250 300 350 400 450 500 0.90 r set = 33.2k 0.92 0.94 0.96 0.98 1.00 1.02 1.04 1.06 1.08 1.10 c out = 10f vioc voltage (v) 30451 g61 c set = 4.7f r l = 6.6 500mv/div 2v/div output with fast start?up (set at 90%) v in = 4.5v to 5v output without fast start?up pulse en/uv 100ms/div 30451 g56 input voltage output voltage v in = 0v to 5v v en/uv = v in r set = 33.2k r set = 33.2k c out = 10f c set = 0.47f r l = 6.6 50ms/div 2v/div 30451 g57 temperature (c) ?75 ?50 ?25 c out = 10f 0 25 50 75 100 125 150 0.90 0.92 0.94 c set = 0.47f 0.96 0.98 1.00 1.02 1.04 1.06 1.08 1.10 vioc voltage (v) 30451 g58 i l = 500ma temperature (c) ?75 ?50 ?25 0 25 50 75 100 125 5s/div 150 0 ?2 ?4 ?6 ?8 ?10 ?12 ?14 ?16 input voltage 500mv/div ?18 ?20 vioc sink current (a) 30451 g60 vioc source current (a) 0 25 50 75 100 output voltage 1mv/div 125 150 175 200 0.90 0.92 0.94 0.96 0.98 1.00
13 for more information www.linear.com/lt3045-1 pin functions in (pins 1, 2): input. these pins supply power to the regulator. the lt3045 -1 requires a bypass capacitor at the in pin. in general, a battery s output impedance rises with frequency, so include a bypass capacitor in battery-powered applications. while a 4.7f input bypass capacitor gener - ally suffices, applications with large load transients may require higher input capacitance to prevent input supply droop. consult the applications information section on the proper use of an input capacitor and its effect on cir cuit performance, in particular psrr. the lt3045 -1 withstands reverse voltages on in with respect to gnd, outs and out. in the case of a reversed input, which occurs if a battery is plugged-in backwards, the lt3045-1 acts as if a diode is in series with its input. hence, no reverse-current flows into the lt3045-1 and no negative voltage appears at the load. the device protects itself and the load. vioc (pin 3): voltage for input-to-output control. the lt3045-1 incorporates a tracking function to control the switching pre-regulator powering the lt3045 -1. the vioc pin is the output of this tracking function that drives the pre- regulators feedback (fb) pin to maintain the lt3045 -1 s input voltage at v out + v vioc . this function minimizes power dissipation while maintaining psrr performance. see applications information section for details. en/uv (pin 4): enable/uvlo. pulling the lt3045-1s en/ uv pin low places the part in shutdown. quiescent current in shutdown drops to less than 1a and the output volt - age turns off. alternatively, the en/uv pin can set an input supply under voltage lockout (uvlo) threshold using a resistor divider between in, en/uv and gnd. the lt3045-1 typically turns on when the en/uv voltage exceeds 1.24v on its rising edge, with a 130mv hysteresis on its falling edge. the en/uv pin can be driven above the input voltage and maintain proper functionality. if unused, tie en/uv to in. do not float the en/uv pin. pg (pin 5) : power good. pg is an open-collector flag that indicates output voltage regulation. pg pulls low if pgfb is below 300mv. if the power good functionality is not needed, float the pg pin. a parasitic substrate diode exists between pg and gnd pins of the lt3045-1; do not drive pg more than 0.3v below gnd during normal operation or during a fault condition. ilim (pin 6) : current limit programming pin. connecting a resistor between ilim and gnd programs the current limit. for best accuracy, kelvin connect this resistor directly to the lt3045-1 s gnd pin. the programming scale factor is nominally 150ma? k. the ilim pin sources current proportional (1:500) to output current; therefore, it also serves as a current monitoring pin with a 0v to 300mv range. if the programmable current limit functionality is not needed, tie ilim to gnd. a parasitic substrate diode exists between ilim and gnd pins of the lt3045-1; do not drive ilim more than 0.3v below gnd during normal operation or during a fault condition. pgfb (pin 7): power good feedback. the pg pin pulls high if pgfb increases beyond 300mv on its rising edge, with 7mv hysteresis on its falling edge. connecting an external resistor divider between out, pgfb and gnd sets the programmable power good threshold with the following transfer function : 0.3v ? (1 + r pg2 /r pg1 ). as discussed in the applications information section, pgfb also activates the fast start-up circuitry. tie pgfb to in if power good and fast start-up functionalities are not needed, and if reverse input protection is additionally required, tie the anode of a 1 n4148 diode to in and its cathode to pgfb. see the typical applications section for details. a parasitic substrate diode exists between pgfb and gnd pins of the lt3045-1; do not drive pgfb more than 0.3v below gnd during normal operation or during a fault condition. set (pin 8): set. this pin is the inverting input of the er - ror amplifier and the regulation set-point for the lt3045- 1. set sour ces a precision 100a current that flows through an external resistor connected between set and gnd. the lt3045-1s output voltage is determined by v set = i set ? ?r set . output voltage range is from zero to 15v. adding a capacitor from set to gnd improves noise, psrr and transient response at the expense of increased start-up time. for optimum load regulation, kelvin con - nect the ground side of the set pin resistor directly to the load. a parasitic substrate diode exists between set and gnd pins of the lt3045-1; do not drive set more than 0.3v below gnd during normal operation or during a fault condition. lt3045-1 30451fa
14 for more information www.linear.com/lt3045-1 pin functions gnd (pin 9, exposed pad pin 13): ground. the exposed backside is an electrical connection to gnd. to ensure proper electrical and thermal performance, solder the exposed backside to the pcb ground and tie it directly to the gnd pin. outs (pin 10): output sense. this pin is the noninvert - ing input to the error amplifier. for optimal transient performance and load regulation, kelvin connect outs directly to the output capacitor and the load. also, tie the gnd connections of the output capacitor and the set pin capacitor directly together . a parasitic substrate diode exists between outs and gnd pins of the lt3045-1; do not drive outs more than 0.3v below gnd during normal operation or during a fault condition. out (pins 11, 12): output. these pins supply power to the load. for stability, use a minimum 10f output capacitor with an esr below 20m and an esl below 2nh. large load transients require larger output capacitance to limit peak voltage transients. refer to the applications informa - tion section for more information on output capacitance. a parasitic substrate diode exists between out and gnd pins of the lt3045-1; do not drive out more than 0.3v below gnd during normal operation or during a fault condition. lt3045-1 30451fa
15 for more information www.linear.com/lt3045-1 block diagram v + ? output overshoot recovery error amplifier internal current limit programmable current limit qc qp out c out c in v in r l v out 1.5v 100a 2ma v + ? 300mv 215 qpwr + ? driver + ? ? + v + ? 300mv ilim r ilim ? + in 1, 2 thermal shdn current reference fast start-up input uvlo set-to-outs protection clamp input uvlo current limit thermal shdn dropout r set r pg r pg2 r pg1 c set fast start-up disable logic outs 30451 bd set pg pgfb en/uv vioc gnd v + ? 300mv v + ? 1.24v programmable power good + ? enable comparator input-to- output control bias + ? ? a v = 1 1.5v + ? 4 3 7 5 9, 13 8 10 6 11, 12 lt3045-1 30451fa
16 for more information www.linear.com/lt3045-1 applications information the lt3045 -1 is a high performance low dropout linear regulator featuring ltc s ultralow noise (2nv / hz at 10khz) and ultrahigh psrr (76db at 1mhz ) architecture for powering noise sensitive applications. designed as a precision current source followed by a high performance rail-to-rail voltage buffer, the lt3045-1 can be easily paral - leled to further reduce noise, increase output current and spread heat on the pcb. the device additionally features programmable current limit, fast start-up capability and programmable power good. the lt3045 -1 is easy to use and incorporates all of the protection features expected in high per formance regula - tors. included are short-circuit protection, safe operating area protection, reverse-battery protection, reverse-current protection, and thermal shutdown with hysteresis. in addition to the lt3045 feature set, the lt3045-1 incor - porates a vioc tracking function to control an upstream switching converter to maintain a constant voltage across the lt3045-1 and hence minimize power dissipation. output v oltage the lt3045 -1 incorporates a precision 100a current source flowing out of the set pin, which also ties to the error amplifier s inverting input. figure?1 illustrates that connecting a resistor from set to ground generates a refer - ence voltage for the error amplifier. this reference voltage is simply the product of the set pin current and the set pin resistor . the error amplifier s unity-gain configuration produces a low impedance version of this voltage on its noninverting input, i.e. the outs pin, which is externally tied to the out pin. figure?1. basic adjustable regulator the lt3045-1 s rail-to-rail error amplifier and current reference allows for a wide output voltage range from 0v (using a 0 resistor) to v in minus dropout up to 15v. a pnp-based input pair is active for 0v to 0.6v output and an npn-based input pair is active for output volt - ages greater than 1.3v, with a smooth transition between the two input pairs from 0.6v to 1.3v output. while the npn-based input pair is designed to offer the best overall performance, refer to the electrical characteristics table for details on offset voltage, set pin current, output noise and psrr variation with the error amp input pair. table 1 lists many common output voltages and their corresponding 1% r set resistors. table 1. 1% resistor for common output voltages v out (v) r set (k) 2.5 24.9 3.3 33.2 5 49.9 12 121 15 150 the benefit of using a current reference compared with a voltage reference as used in conventional regulators is that the regulator always operates in unity gain configuration, independent of the programmed output voltage. this al - lows the lt3045-1 to have loop gain, frequency response and bandwidth independent of the output voltage. as a result, noise, psrr and transient performance do not change with output voltage. moreover, since none of the error amp gain is needed to amplify the set pin voltage to a higher output voltage, output load regulation is more tightly specified in the hundreds of microvolts range and not as a fixed percentage of the output voltage. since the zero tc current source is highly accurate, the set pin resistor can become the limiting factor in achiev - ing high accuracy. hence, it should be a precision resistor. additionally , any leakage paths to or from the set pin create errors in the output voltage. if necessar y, use high quality insulation (e.g., teflon, kel-f) ; moreover, clean - ing of all insulating surfaces to remove fluxes and other residues may be required. high humidity environments may require a sur face coating at the set pin to provide a moisture barrier . + ? 100a in en/uv pgfb vioc gnd out lt3045-1 ilim pg 10f 4.7f v in 5v 5% 0.47f v out, 3.3v i out(max) , 500ma 30451 f01 33.2k set outs lt3045-1 30451fa
17 for more information www.linear.com/lt3045-1 applications information minimize board leakage by encircling the set pin with a guard ring operated at a potential close to itself ideally tied to the out pin. guarding both sides of the circuit board is recommended. bulk leakage reduction depends on the guard ring width. leakages of 100na into or out of the set pin creates a 0.1% error in the reference voltage. leakages of this magnitude, coupled with other sources of leakage, can cause significant errors in the output volt - age, especially over wide operating temperature range. figure?2 illustrates a typical guard ring layout technique. figure?2. dfn guard ring layout figure? 3 , minimize the effects of pcb trace and solder inductance by tying the outs pin directly to c out and the gnd side of cset directly to the gnd side of c out , as well as keep the gnd sides of c in and c out reasonably close. refer to the lt3045-1 demo board manual for more information on the recommended layout that meets these requirements. while the lt3045-1 is robust enough not to oscillate if the recommended layout is not followed, depending on the actual layout, phase/gain margin, noise and psrr performance may degrade. stability and output capacitance the lt3045 -1 requires an output capacitor for stability. given its high bandwidth, ltc recommends low esr and esl ceramic capacitors. a minimum 10f output capaci - tance with an esr below 20m and an esl below 2nh is required for stability . given the high psrr and low noise per formance attained using a single 10f ceramic output capacitor, larger values of output capacitor only marginally improves the perfor - mance because the regulator bandwidth decreases with increasing output capacitance hence, there is little to be gained by using larger than the minimum 10f output capacitor. nonetheless, larger values of output capacitance do decrease peak output deviations during a load transient. note that bypass capacitors used to decouple individual components powered by the lt3045 -1 increase the ef - fective output capacitance. figure?3. c out and c set connections for best performance 30451 f02 out set 12 11 8 9 10 4 5 3 2 1 6 7 13 since the set pin is a high impedance node, unwanted signals may couple into the set pin and cause erratic behavior. this is most noticeable when operating with a minimum output capacitor at heavy load currents. by - passing the set pin with a small capacitance to ground resolves this issue 10nf is sufficient. for applications requiring higher accuracy or an adjust - able output voltage, the set pin may be actively driven by an external voltage source capable of sinking 100a. connecting a precision voltage reference to the set pin eliminates any errors present in the output voltage due to the reference current and set pin resistor tolerances. output sensing and stability the lt3045-1 s outs pin provides a kelvin sense con - nection to the output. the set pin resistor s gnd side provides a kelvin sense connection to the load s gnd side. additionally, for ultrahigh psrr, the lt3045-1 bandwidth is made quite high (~1mhz ), making it very close to a typical 10f (1206 case size) ceramic output capacitors self-resonance frequency (~1.6mhz ). therefore, it is very important to avoid adding extra impedance (esr and esl) outside the feedback loop. to that end, as shown in lt3045-1 30451fa lt3045-1 demo board pcb layout illustrates 4-terminal connection to c out 100a outs pg ilim 30451 f03 gnd pgfb en/uv c out v out i out(max) : 500ma v in r set c set c in out in set vioc
18 for more information www.linear.com/lt3045-1 applications information give extra consideration to the type of ceramic capacitors used. they are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are specified with eia temperature characteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitance in the small packages, but they tend to have stronger voltage and temperature coefficients as shown in figure?4 and figure?5. when used with a 5v regulator, a 16v 10f y5v capacitor can exhibit an effective value as low as 1f to 2f for the dc bias voltage applied over the operating temperature range. x5r and x7r dielectrics result in more stable character - istics and are thus more suitable for lt3045-1. the x7r dielectric has better stability across temperature, while the x5r is less expensive and is available in higher values. nonetheless, care must still be exer cised when using x5r and x7r capacitors. the x5r and x7r codes only specify operating temperature range and the maximum capacitance change over temperature. while capacitance change due to dc bias for x5r and x7r is better than y5v and z5u dielectrics, it can still be significant enough to drop capacitance below sufficient levels. as shown in figure?6, capacitor dc bias characteristics tend to improve as component case size increases, but verification of expected capacitance at the operating voltage is highly recommended . due to its good voltage coefficient in small case sizes, ltc recommends using murata s gj8 series ceramic capacitors. high vibration environments voltage and temperature coefficients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress upon it, similar to how a piezoelectric microphone works. for a ceramic capacitor, this stress can be induced by mechanical vibrations within the system or due to thermal transients. lt3045-1 applications in high vibration environments have three distinct piezoelectric noise generators: ceramic output, input, and set pin capacitors. however, due to lt3045-1 s very low output impedance over a wide fre - quency range, negligible output noise is generated using figure?4. ceramic capacitor dc bias characteristics figure?5. ceramic capacitor temperature characteristics figure?6. capacitor voltage coefficient for different case sizes dc bias voltage (v) both capacitors are 16v, 1210 case size, 10f 0 ?100 change in value (%) ?80 642 8 10 12 30451 f04 14 0 20 ?60 ?40 x5r y5v ?20 16 temperature (c) ?50 ?100 change in value (%) ?80 250?25 50 75 100 30451 f05 0 20 40 ?60 ?40 y5v ?20 125 both capacitors are 16v, 1210 case size, 10f x5r dc bias (v) 1 ?100 change in value (%) ?80 ?60 ?40 ?20 0 20 5 10 15 20 30451 f06 25 grm series, 0805, 1.45mm thick grm series, 1206, 1.8mm thick grm series, 1210, 2.2mm thick gj8 series, 1206, 1.9mm thick murata: 25v,10%, x7r/x5r, 10f ceramic lt3045-1 30451fa
19 for more information www.linear.com/lt3045-1 applications information a ceramic output capacitor. similarly, due to lt3045-1s ultrahigh psrr, negligible output noise is generated using a ceramic input capacitor. nonetheless, given the high set pin impedance, any piezoelectric response from a ceramic set pin capacitor generates significant output noise C peak-to-peak excursions of hundreds of vs. however, due to the set pin capacitor s high esr and esl tolerance, any non-piezoelectrically responsive (tantalum, electrolytic, or film) capacitor can be used at the set pin C although electrolytic capacitors tend to have high 1/f noise. in any case, use of a surface mount capacitor is highly recommended. stability and input capacitance the lt3045 -1 is stable with a minimum 4.7f in pin capaci - tor. ltc recommends using low esr ceramic capacitors. in cases where long wires connect the power supply to the lt3045 -1 s input and ground terminals, the use of low value input capacitors combined with a large load current can result in instability. the resonant lc tank circuit formed by the wire inductance and the input capacitor is the cause and not because of lt3045-1s instability. the self-inductance, or isolated inductance, of a wire is directly proportional to its length. the wire diameter, however, has less influence on its self-inductance. for example, the self-inductance of a 2- awg isolated wire with a diameter of 0.26" is about half the inductance of a 30- awg wire with a diameter of 0.01". one foot of 30-awg wire has 465nh of self-inductance. several methods exist to reduce a wires self-inductance. one method divides the current flowing towards the lt3045-1 between two parallel conductors. in this case, placing the wires further apart reduces the inductance ; up to a 50% reduction when placed only a few inches apart. splitting the wires connect two equal inductors in parallel. however, when placed in close proximity to each other, their mutual inductance adds to the overall self inductance of the wires therefore a 50% reduction is not possible in such cases. the second and more effective technique to reduce the overall inductance is to place the forward and return current conductors (the input and ground wires) in close proximity. two 30- awg wires separated by 0.02" reduce the overall inductance to about one-fifth of a single wire. if a battery mounted in close proximity powers the lt3045 - 1, a 4.7f input capacitor suffices for stability. however, if a distantly located supply powers the lt3045 -1, use a larger value input capacitor. use a rough guideline of 1f (in addition to the 4.7f minimum) per 6" of wire length. the minimum input capacitance needed to stabilize the application also varies with the output capacitance as well as the load current. placing additional capacitance on the lt3045-1 s output helps. however, this requires significantly more capacitance compared to additional input bypassing. series resistance between the supply and the lt3045-1 input also helps stabilize the application; as little as 0.1 to 0.5 suffices. this impedance dampens the lc tank circuit at the expense of dropout voltage. a better alternative is to use a higher esr tantalum or electrolytic capacitor at the lt3045-1 input in parallel with a 4.7f ceramic capacitor. psrr and input capacitance for applications utilizing the lt3045-1 for post-regulating switching converters, placing a capacitor directly at the lt3045 -1 input results in ac current (at the switching frequency) to flow near the lt3045-1. this relatively high- frequency switching current generates a magnetic field that couples to the lt3045 -1 output, thereby degrading its effective psrr. while highly dependent on the pcb, the switching pre-regulator, the input capacitance, amongst other factors, the psrr degradation can be easily over 30db at 1mhz. this degradation is present even if the lt3045 -1 is de-soldered from the board, because it ef - fectively degrades the psrr of the pc board itself. while negligible for conventional low psrr ldos, l t3045-1s ultrahigh psrr requires careful attention to higher order parasitics in order to extract the full performance offered by the regulator. to mitigate the flow of high-frequency switching current near the lt3045-1, the lt3045-1 input capacitor can be entirely removed -- as long as the switching converter s output capacitor is located more than an inch away from the lt3045 -1. magnetic coupling rapidly decreases with increasing distance. nonetheless, if the switching pre- lt3045-1 30451fa
20 for more information www.linear.com/lt3045-1 applications information regulator is placed too far away (conservatively more than a couple inches) from the lt3045-1, with no input capacitor present, as with any regulator, the lt3045-1 input will oscillate at the parasitic lc resonance frequency. besides, it is generally a very common (and a preferred) practice to bypass regulator input with some capacitance. so this option is fairly limited in its scope and not the most palatable solution. to that end, ltc recommends using the lt3045 -1 demo board layout for achieving the best possible psrr perfor - mance. the lt3045 -1 demo board layout utilizes magnetic field cancellation techniques to prevent psrr degradation caused by this high-frequency current flow while utilizing the input capacitor. filtering high frequency spikes for applications where the lt3045-1 is used to post- regulate a switching converter, its high psrr effectively suppresses any noise present at the switcher s switching frequency typically 100khz to 4mhz . however, the very high frequency (hundreds of mhz) spikes beyond the lt3045-1s bandwidth associated with the switchers power switch transition times will almost directly pass through the lt3045-1. while the output capacitor is partly intended to absorb these spikes, its esl will limit its ability at these frequencies. a ferrite bead or even the inductance associated with a short (e.g. 0.5) pcb trace between the switchers output and the lt3045-1 s input can serve as an lc-filter to suppress these very high frequency spikes. output noise the lt3045 -1 offers many advantages with respect to noise performance. traditional linear regulators have several sources of noise. the most critical noise sources for a traditional regulator are its voltage reference, error amplifier, noise from the resistor divider network used for setting output voltage and the noise gain created by this resistor divider. many low noise regulators pin out their voltage reference to allow for noise reduction by bypassing the reference voltage. unlike most linear regulators, the lt3045-1 does not use a voltage reference; instead, it uses a 100a current refer - ence. the current reference operates with typical noise current level of 20pa / hz (6na rms over a 10hz to 100khz bandwidth). the resultant voltage noise equals the current noise multiplied by the resistor value, which in turn is rms summed with the error amplifier s noise and the resistor s own noise of 4ktr whereby k = boltzmann s constant 1.38 ? 10 C23 j/k and t is the absolute temperature. one problem that conventional linear regulators face is that the resistor divider setting the output voltage gains up the reference noise. in contrast, the lt3045-1s unity-gain follower architecture presents no gain from the set pin to the output. therefore, if a capacitor bypasses the set pin resistor, then the output noise is independent of the programmed output voltage. the resultant output noise is then set just by the error amplifiers noise typically 2nv/hz from 10khz to 1mhz and 0.8v rms in a 10hz to 100khz bandwidth using a 4.7f set pin capacitor. paralleling multiple lt3045-1s further reduces noise by n, for n parallel regulators. refer to the typical performance characteristics section for noise spectral density and rms integrated noise over various load currents and set pin capacitances. set pin (bypass) capacitance: noise, psrr, transient response and soft-start in addition to reducing output noise, using a set pin bypass capacitor also improves psrr and transient performance. note that any bypass capacitor leakage deteriorates the lt3045-1 s dc regulation. capacitor leakage of even 100na is a 0.1% dc error. therefore, ltc recommends the use of a good quality low leakage ceramic capacitor. using a set pin bypass capacitor also soft-starts the output and limits inrush current. the rc time constant, formed by the set pin resistor and capacitor, controls soft-start time. ramp-up rate from 0 to 90% of nominal v out is: t ss 2.3 ? r set ? c set (fast start-up disabled) fast start-up for ultralow noise applications that require low 1/f noise (i.e. at frequencies below 100hz), a larger value set pin capacitor is required, up to 22f . while this would normally significantly increase the regulators start-up time, the lt3045-1 30451fa
21 for more information www.linear.com/lt3045-1 applications information lt3045 -1 incorporates fast start-up circuitry that increases the set pin current to about 2ma during start-up. as shown in the block diagram, the 2ma current source remains engaged while pgfb is below 300mv, unless the regulator is in current limit, dropout, thermal shutdown or input voltage is below minimum v in . if fast start-up capability is not used, tie pgfb to in or to out for output voltages above 300mv. note that doing so also disables power good functionality. enable/uvlo the en/uv pin is used to put the regulator into a micro - power shutdown state. the lt3045-1 has an accurate 1.24v turn-on threshold on the en/uv pin with 130mv of hysteresis. this threshold can be used in conjunction with a resistor divider from the input supply to define an accurate undervoltage lockout (uvlo) threshold for the regulator. the en/uv pin current (i en ) at the threshold from the electrical characteristics table needs to be considered when calculating the resistor divider network: v in(uvlo) = 1.24v ? 1 + r en2 r en1 ? ? ? ? ? ? + i en ?r en2 the en/uv pin current (i en ) can be ignored if r en1 is less than 100k. if unused, tie en/uv pin to in. programmable power good as illustrated in the block diagram, power good thresh - old is user programmable using the ratio of two external resistors, r pg2 and r pg1 : v out(pg _ threshold) = 0.3v ? 1 + r pg2 r pg1 ? ? ? ? ? ? + i pgfb ?r pg2 if the pgfb pin increases above 300mv , the open-collector pg pin de-asserts and becomes high impedance. the power good comparator has 7mv hysteresis and 5s of deglitching. the pgfb pin current (i pgfb ) from the electrical characteristics table must be considered when determining the resistor divider network. the pgfb pin current (i pgfb ) can be ignored if r pg1 is less than 30k. if power good functionality is not used, float the pg pin. please note that programmable power good and fast start-up capabilities are disabled for output voltages below 300mv. externally programmable current limit the ilim pin s current limit threshold is 300mv . connecting a resistor from ilim to gnd sets the maximum current flowing out of the ilim pin, which in turn programs the lt3045-1 s current limit. with a 150ma ? k? programming scale factor, the current limit can be calculated as follows : current limit = 150ma ?k r ilim for example, a 1k resistor programs the current limit to 150ma and a 2k resistor programs the current limit to 75ma . for good accuracy, kelvin connect this resistor to the lt3045-1s gnd pin. in cases where in-to-out differential is greater than 12v, the lt3045-1 s foldback circuitry decreases the internal current limit. as a result, internal current limit may over - ride the externally programmed current limit level to keep the lt3045 -1 within its safe-operating-area (soa). see the internal current limit vs input-to-output differential graph in the t ypical performance characteristics section. as shown in the block diagram, the ilim pin sources current proportional (1:500) to output current; therefore, it also serves as a current monitoring pin with a 0v to 300mv range. if external current limit or current monitoring is not used, tie ilim to gnd. output overshoot recovery during a load step from full load to no load (or light load), the output voltage overshoots before the regulator responds to turn the power transistor off. given that there is no load (or very light load) present at the output, it takes a long time to discharge the output capacitor. as illustrated in the block diagram, the lt3045-1 incor - porates an overshoot recovery circuitry that turns on a current sink to discharge the output capacitor in the event outs is higher than set . this current is typically about 4ma . no load recovery is disabled for input voltages less than 2.5v or output voltages less than 1.5v. lt3045-1 30451fa
22 for more information www.linear.com/lt3045-1 applications information if outs is externally held above set, the current sink turns on in an attempt to restore outs to its programmed voltage. the current sink remains on until the external circuitry releases outs. direct paralleling for higher current higher output current is obtained by paralleling multiple lt3045- 1s . tie all set pins together and all in pins together. connect the out pins together using small pieces of pcb trace (used as a ballast resistor) to equalize currents in the lt3045-1s . pcb trace resistance in milliohms/inch is shown in table 2. table 2. pc board trace resistance weight (oz) 10mil width 20mil width 1 54.3 27.1 2 27.1 13.6 trace resistance is measured in m/in. the small worst-case offset of 2mv for each paralleled lt3045-1 minimizes the required ballast resistor value. figure?7 illustrates that two lt3045 - 1s , each using a 20m pcb trace ballast resistor, provide better than 20% accurate output current sharing at full load. the two 20m external resistors only add 10mv of output regulation drop with a 1a maximum current. with a 3.3v output, this only adds 0.3% to the regulation accuracy. as has been discussed previously, tie the outs pin directly to the output capacitor . more than two lt3045-1s can also be paralleled for even higher output current and lower output noise. paralleling multiple lt3045-1s is also useful for distributing heat on the pcb. for applications with high input-to-output voltage differential, an input series resistor or resistor in parallel with the lt3045-1 can also be used to spread heat. pcb layout considerations given the lt3045-1 s high bandwidth and ultrahigh psrr, careful pcb layout must be employed to achieve full device performance. figure?8 shows a recommended layout that delivers full performance of the regulator. refer to the lt3045-1s dc2593a demo board manual for further details. figure?7. parallel devices figure?8. recommended dfn layout + ? 100a in en/uv pgfb gnd out lt3045-1 ilim pg 10f 20m v out 3.3v i out(max) 1a 30451 f07 16.5k set outs + ? 100a in en/uv pgfb gnd out lt3045-1 vioc vioc ilim pg 10f 20m 10f v in 5v 5% set outs 0.47f lt3045-1 30451fa
23 for more information www.linear.com/lt3045-1 high efficiency linear regulator: voltage input-to- output control (vioc) the vioc pin is used to control an upstream switching converter (e.g. buck, boost, buck-boost, etc) to maintain a constant voltage across the lt3045-1, regardless of the ldo s output voltage. this maximizes efficiency while maintaining psrr performance. the vioc pin is the output of a fast unity-gain amplifier that measures the difference between in and out or 1.5v, whichever is higher. as shown in figure?9, the vioc feature is simple to use. just tie the vioc pin to the upstream switching converter s feedback (fb) pin, and this will regulate the lt3045-1s input-to-output differential to the switching converters feedback voltage. when paralleling multiple lt3045-1s, tie the vioc pin of one of the lt3045-1 to the upstream switching converters feedback pin and float the remaining vioc pins. while the vioc buffer is inside the switching converters feedback loop, given the vioc buffers high bandwidth, the switching converter s frequency compensation doesn t need to be adjusted. phase delay through the vioc buffer is typically less than 2 for frequencies as high as 100khz; hence, within the switching converter s bandwidth (usually much less than 100khz), the vioc buffer will be transpar - ent and just act like an ideal wire. for example, for a switching converter with less than 100khz bandwidth and a phase margin of 50, using the vioc buffer, the phase margin will degrade by at most 2. hence, the phase margin for the switching converter (using the vioc pin) will be at least 48. given the vioc buffer is inside the switching converters feedback loop, the total capacitance on the vioc pin is required to be below 20pf. as shown in figure? 10, the input-to-output differential voltage is easily programmable to support different ap - applications information figure?9. vioc basic operation lt3045-1 v ldoout : variable i out(max) : 500ma 30451 f09 + ? in en/uv pgfb gnd out vioc ilim pg 10f v in set outs r1 upstream dc/dc converter sw in fb 0.47f 1 v ldoin v fbswitcher figure?10. programming input-to-output differential lt3045-1 v out : variable i out(max) : 500 ma 30451 f10 + ? in en/uv pgfb gnd out vioc ilim pg 10f v in set outs r3 r1 r2 upstream dc/dc converter sw in fb 0.47f 1 lt3045-1 30451fa
24 for more information www.linear.com/lt3045-1 applications information plication needs (psrr vs. power dissipation) using the following equation: v ldoin C v ldoout = v vioc = v fbswitcher ? r1 + r2 r1 furthermore, in the event the lt3045-1 set pin opens up, the lt3045 -1 input voltage can rise up to the switcher s input voltage, and thus potentially violate the lt3045-1s absolute maximum rating. to prevent this, the maximum lt3045-1 input voltage can be set using a resistor (r3) between the vioc and in pins of the regulator such that: v (max)ldoin = v fbswitcher ? r1 + r2 + r3 r1 + i sink ? r3 moreover, the vioc pin is capable of sourcing 200a and sinking 15a of current. to mitigate the effect of the sink current on the maximum ldo input voltage (shown above), choose r1 such that the resistor divider typically runs at least 100a. for v out > 1.5v , v in = v out + v vioc . the vioc pin volt- age (and hence the input-to-output differential) can be programmed anywhere between a minimum of 1v and a maximum of 4v or v out ? C? 0.5v (for v out ? >? 1.5v), whichever is lower. for applications where the feedback pin of the switching regulator is below 1v, use resistors r1 and r2 to make sure the vioc pin is within the afore - mentioned range. note that the vioc pin voltage cannot be programmed below the upstream switching converter s feedback pin. for v out ??1.5v , the vioc programming range is 1v 5%. if vioc is set to be outside this range, then the lt3045-1 input voltage will rise to the maximum value set using r3 . if vioc functionality is not used, float the vioc pin. given the maximum vioc programming voltage is de - pendent on v out , care must be taken in setting the vioc voltage. for instance, if vioc is set to 1v, the ldos in- to-out differential will be regulated to 1v for v out > 1.5v. similarly, if vioc is set to 2v, the regulators in-to-out differential will be regulated to 2v for v out > 2.5v (i.e. v vioc + 0.5v ). however, if the output voltage is below 2.5v, for this example, then the ldo will not be able to drive its vioc pin to the right level of 2v . as a result, the upstream pre-regulators output will rise, thereby caus - ing the lt3045-1 input voltage to rise to the maximum voltage set using r3 . hence, for protection under various fault conditions, the use of r3 to set the maximum v in voltage (below 20v) is required. typical vioc application figure?11 shows a typical vioc application used to post- regulate the output of the lt8608 buck converter. the vioc voltage is set at 1v with the maximum ldo input voltage set to 16.5v . figure?12 shows the ldos input and output voltage when pulsing the lt3045-1s en/uv pin, and as figure?11. typical lt3045-1 post-regulating application + ? 100a in en/uv pgfb vioc gnd out lt3045-1 ilim pg 10f 47f v in 20v 4.7f v out : variable i out(max) : 500ma 30451 f11 249 140k set outs lt8608 bst sw pg fb in en/uv tr/ss mode r t intv cc 7.68k 40.2k 2.2h 2.21k gnd 10nf 1f 0.22f f sw = 1mhz l: xfl4020-222mec v ldoin ? v ldout = 1v v maxldoin = 16.5v lt3045-1 30451fa
25 for more information www.linear.com/lt3045-1 applications information can be seen, when the ldo is disabled, the ldo input volt - age goes to the maximum input voltage set by the resistor divider on the vioc pin. figure? 13 shows the load step response of the lt8608 using the vioc buffer. figure?14 shows the ldos input and output voltage response to stepping the set pin from 3v to 4v . figure?15 shows the ldos output and input voltage while ramping the set pin from 0v to 10v, and as can be seen, the lt8608s output voltage tracks the lt3045s output voltage when it is greater than 1.5v . lastly, figure?16 shows the noise spectral density at the lt3045-1 input and output. figure?12. lt3045-1 en/uv pulse figure?13. load step response using the vioc buffer figure?14. stepping v set from 3v to 4v (and back to 3v) v set and ldo out are overlaid figure?15. ramping v set from 0v to 10v (and back to 0v) v set and ldo out are overlaid figure?16. lt3045-1s input and output noise spectral density lt3045-1 30451fa 1v/div 5v/div 0v 30451 f12 i load ldo in (ac) ldo out (ac) r set = 33.2k i load = 10ma to 500ma 200s/div v en/uv 0ma 500ma/div 100mv/div 50mv/div 30451 f13 v set ldo in ldo out v set = 3v to 4v i l = 500ma ldo in 1ms/div 0v 1v/div 30451 f14 v set ldo out ldo in i l = 500ma 5ms/div 2v/div ldo out 0v 30451 f15 ldo in = 4.3v ldo out = 3.3v i load = 500ma ldo out ldo in noise floor frequency (hz) 10 r set = 33.2k 100 1k 10k 100k 1m 10m 0.01 0.1 1 10 r l = 6.6 100 1000 noise (v/ hz ) 30451 f16 v in lt8608 = 20v 500ms/div 0v
26 for more information www.linear.com/lt3045-1 thermal considerations the lt3045 -1 has internal power and thermal limiting circuits that protect the device under overload conditions. the thermal shutdown temperature is nominally 165c with about 8c of hysteresis. for continuous normal load conditions, do not exceed the maximum junction temperature (125c for e- and i-grades). it is important to consider all sources of thermal resistance from junction to ambient. this includes junction-to-case, case-to-heat sink interface, heat sink resistance or circuit board-to-ambient as the application dictates. additionally, consider all heat sources in close proximity to the lt3045-1. the undersides of the dfn and msop packages have exposed metal from the lead frame to the die attachment. both packages allow heat to directly transfer from the die junction to the pcb metal to limit maximum operating junction temperature. the dual-in-line pin arrangement allows metal to extend beyond the ends of the package on the topside (component side) of the pcb. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pcb and its copper traces. copper board stiffeners and plated through- holes can also be used to spread the heat generated by the regulator. tables 3 and 4 list thermal resistance as a function of copper area on a fixed board size. all measurements were taken in still air on a 4 layer fr-4 board with 1oz solid internal planes and 2oz top/bottom planes with a total board thick - ness of 1.6mm. the four layers were electrically isolated with no thermal vias present. pcb layers, copper weight, board layout and thermal vias affect the resultant thermal resistance. for more information on thermal resistance and high thermal conductivity test boards, refer to jedec standard je sd51 , notably jesd51-7 and jesd51-12. achieving low thermal resistance necessitates attention to detail and careful pcb layout. table 3. measured thermal resistance for dfn package copper area board area thermal resistance top side* bottom side 2500mm 2 2500mm 2 2500mm 2 34c/w 1000mm 2 2500mm 2 2500mm 2 34c/w 225mm 2 2500mm 2 2500mm 2 35c/w 100mm 2 2500mm 2 2500mm 2 36c/w *device is mounted on topside table 4. measured thermal resistance for msop package copper area board area thermal resistance top side* bottom side 2500mm 2 2500mm 2 2500mm 2 33c/w 1000mm 2 2500mm 2 2500mm 2 33c/w 225mm 2 2500mm 2 2500mm 2 34c/w 100mm 2 2500mm 2 2500mm 2 35c/w *device is mounted on topside calculating junction temperature example: given an output voltage of 3.3v and input voltage of 5v 5%, output current range from 1ma to 500ma, and a maximum ambient temperature of 85c , what is the maximum junction temperature? the lt3045-1s power dissipation is: i out(max) ? (v in(max) C v out ) + i gnd ? v in(max) where: i out(max) = 500ma v in(max) = 5.25v i gnd (at i out = 500ma and v in = 5.25v) = 12.5ma thus: p diss = 0.5a ? ( 5.25v C 3.3v) + 12.5ma ? 5.25v = 1w using a dfn package, the thermal resistance is in the range of 34c/w to 36c/w depending on the copper area. therefore, the junction temperature rise above ambient approximately equals: 1w ? 35c/w = 35c applications information lt3045-1 30451fa
27 for more information www.linear.com/lt3045-1 applications information the maximum junction temperature equals the maxi- mum ambient temperature plus the maximum junction temperature rise above ambient: t jmax = 85c + 35c = 120c overload recovery like many ic power regulators, the lt3045 -1 incorporates safe-operating-area (soa) protection. the soa protection activates at input-to-output differential voltages greater than 12v . the soa protection decreases the current limit as the input-to-output differential increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltages up to the lt3045-1s absolute maximum ratings. the lt3045-1 provides some level of output current for all values of input-to-output dif - ferentials. refer to the current limit curves in the typical per formance characteristics section. when power is first applied and input voltage rises, the output follows the input and keeps the input-to-output differential low to allow the regulator to supply large output current and start-up into high current loads. due to current limit foldback, however, at high input volt - ages a problem can occur if the output voltage is low and the load current is high. such situations occur after the removal of a short-circuit or if the en/uv pin is pulled high after the input voltage has already turned on. the load line in such cases intersects the output current profile at two points. the regulator now has two stable operating points. with this double intersection, the input power supply may need to be cycled down to zero and brought back up again to make the output recover. other linear regulators with foldback current limit protection (such as the lt1965 and lt1963a) also exhibit this phenomenon, so it is not unique to the lt3045-1. protection features the lt3045 -1 incorporates several protection features for battery-powered applications. precision current limit and thermal overload protection protect the lt3045-1 against overload and fault conditions at the device s output. for normal operation, do not allow the junction temperature to exceed 125c (e-grade, i-grade). to protect the lt3045-1 s low noise error amplifier, the set-to-outs protection clamp limits the maximum voltage between set and outs with a maximum dc current of 20ma through the clamp. so for applications where set is actively driven by a voltage source, the voltage source must be current limited to 20ma or less. moreover, to limit the transient current flowing through these clamps during a transient fault condition, limit the maximum value of the set pin capacitor (c set ) to 22f. the lt3045 -1 also incorporates reverse input protection whereby the in pin withstands reverse voltages of up to C20v without causing any input current flow and without developing negative voltages at the out pin. the regulator protects both itself and the load against batteries that are plugged-in backwards. in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to gnd, pulled to some intermediate voltage, or left open- circuit. in all of these cases, the reverse-current protection circuitry prevents current flow from output to the input. nonetheless, due to the outs-to-set clamp, unless the set pin is floating, current can flow to gnd through the set pin resistor as well as up to 15ma to gnd through the output overshoot recovery circuitry. this current flow through the output overshoot recovery circuitry can be significantly reduced by placing a schottky diode between outs and set pins, with its anode at the outs pin. lt3045-1 30451fa
28 for more information www.linear.com/lt3045-1 typical applications 12v in to 3.3v out with 0.8v rms integrated noise 100a in en/uv pg gnd out lt3045-1 vioc ilim pgfb 453k 10f 4.7f v in 12v 5% 200k 4.7f v out 3.3v i out 200ma 49.9k 30451 ta02 33.2k set outs + ? 750 low noise cc/cv lab power supply ultralow noise current source for rf biasing applications 30451 ta04 + ? v in 1.8v to 20v vioc 30451 ta03 + ? v out(max) = 100 a ? r set i out(max) = 150ma ? k r iout vioc lt3045-1 30451fa pgfb ilim gnd pg en/uv 4.7f output current noise = 0.8v rms /r out increase r1 (and r set ) to reduce current noise r set 2k r load v out(max) : 15v 10f r out = r 1 + r load r1 1 10f 0.47f 4.7f r set r iout v in out 4.7f in set lt3045-1 v out 100a outs pgfb ilim gnd pg out en/uv in set lt3045-1 100a outs
29 for more information www.linear.com/lt3045-1 typical applications programming undervoltage lockout 30451 ta05 + ? v in(uvlo)rising = 1.24v ? 1 + 110k 49.9k ? ? ? ? ? ? vioc ratiometric tracking 30451 ta06 + ? + ? vioc vioc lt3045-1 30451fa 4v turn-on 3.4v turn-off out in set lt3045-1 v out 3.3v i 10f out(max) 500ma 100a outs en/uv ilim gnd pg pgfb 10f 33.2k 0.1f 10f 33.2k 10f 0.1f 16.9k v in 5.5v to 20v v 0.47f out 3.3v min load 200a out in set lt3045-1 v out 5v 100a r en2 110k outs ilim gnd pgfb pg en/uv out in set lt3045-1 r en1 49.9k 100a outs ilim gnd pgfb pg en/uv 4.7f v in
30 for more information www.linear.com/lt3045-1 typical applications paralleling multiple devices using ilim (current monitor) to cancel ballast resistor drop ultralow 1/f noise reference buffer 30451 ta07 + ? vioc + ? + ? 30451 ta08 vioc vioc lt3045-1 30451fa = 5v i out(max) 500ma 100a outs ilim gnd ltc6655-5 1,2 3,4,5 10f 6,7 10f 49.9k 1k v in 6v 5% pgfb pg en/uv 10f n = number of devices in parallel r cdc = cable (ballast resistor) drop cancellation resistor r ilim = current limit programming resistor r ballast = ballast resistor ilim = output current limit 4.7f 10f 20m 1f 10f out in set lt3045-1 100a 100a 4.7f outs pgfb ilim gnd pg en/uv in pgfb pg en/uv out 16.5k r ilim 287 r cdc 5 r ilim = 150ma ? k/ilim C r cdc ? n = 287 (for 500ma ilim per regulator) r cdc = r ballast ? 500/n = 5 v out = 3.3v i out(max) = 1a 287 20m out lt3045-1 in outs set ilim gnd v in 5v 5% set lt3045-1 v out
31 for more information www.linear.com/lt3045-1 typical applications paralleling multiple lt3045 - 1s for 2a output current + ? + ? 30451 ta09 + ? + ? output noise = 0.8v rms 4 = 0.4v rms vioc vioc vioc vioc lt3045-1 30451fa 100a 100a outs pgfb ilim gnd pg en/uv in pgfb 10f pg en/uv 8.25k 20m out lt3045-1 outs set ilim gnd 10f 10f 10f 20m 22f out in set lt3045-1 100a 100a 20m outs pgfb gnd pg en/uv in pgfb pg en/uv 453k 4.7f 200k 49.9k v out = 3.3v i out(max) = 2a dropout = 300mv 20m out lt3045-1 outs set ilim ilim out gnd v in 5v 5% in set lt3045-1
32 for more information www.linear.com/lt3045-1 typical applications low noise wheatstone bridge power supply + ? vioc pgfb disabled without reverse input protection pgfb disabled with reverse input protection + ? 30451 ta11 vioc 30451 ta12 + ? vioc lt3045-1 30451fa r1 r3 + ? r4 v in 5v 5% out in set 10f lt3045-1 30451 ta10 v out : 3.3v and i out(max) : 500ma 100a outs pgfb 33.2k ilim gnd pg en/uv resistor tolerance bridge psrr noise at v bridge using lt1763 1% 5% 40db 4.7f 26db 8nv rms 42.5nv rms perfect matching infinite ? noise at v bridge using lt3045-1 200nv rms 1000nv rms ? 200k lt1763 noise: 20v rms (10hz to 100khz) lt3045-1 noise: 0.8v rms (10hz to 100khz) v bridge r set 10f 0.47f 4.7f v in out in set 453k lt3045-1 v out 100a outs ilim gnd pgfb pg en/uv 0.47f 49.9k 10f 1n4148 4.7f r set v in out in set v out 100a 4.7f outs pgfb ilim gnd pg en/uv lt3045-1 r2
33 for more information www.linear.com/lt3045-1 package description please refer to http://www.linear.com/product/lt3045-1#packaging for the most recent package drawings. 3.00 0.10 (4 sides) note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad and tie bars shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 0.75 0.05 r = 0.115 typ 1 6 12 7 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd12) dfn 0106 rev a recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.23 0.05 0.25 0.05 2.25 ref 2.38 0.05 1.65 0.05 2.10 0.05 0.70 0.05 3.50 0.05 package outline pin 1 notch r = 0.20 or 0.25 45 chamfer 2.38 0.10 2.25 ref 0.45 bsc 0.45 bsc dd package 12-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1725 rev a) lt3045-1 30451fa
34 for more information www.linear.com/lt3045-1 package description please refer to http://www.linear.com/product/lt3045-1#packaging for the most recent package drawings. msop (mse12) 0213 rev g 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.22 ?0.38 (.009 ? .015) typ 0.86 (.034) ref 0.650 (.0256) bsc 12 12 11 10 9 8 7 7 detail ?b? 1 6 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane recommended solder pad layout bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 1 2 3 4 5 6 3.00 0.102 (.118 .004) (note 4) 0.406 0.076 (.016 .003) ref 4.90 0.152 (.193 .006) detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc mse package 12-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1666 rev g) lt3045-1 30451fa
35 for more information www.linear.com/lt3045-1 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 09/17 modified typical application circuit. modified conditions for 3 vioc curves: i out = 1ma. modified figure 11. 1 12 23 lt3045-1 30451fa
36 for more information www.linear.com/lt3045-1 lt 0917 rev a ? printed in usa ? linear technology corporation 2017 www.linear.com/lt3045-1 related parts typical application + ? 100a in en/uv pgfb gnd out lt3045-1 ilim pg 10f 20m v out : variable i out(max) : 1a 30451 ta13 set outs + ? 100a in en/uv pgfb gnd out lt3045-1 vioc vioc ilim pg 10f 20m v in set outs 0.47f r3 r1 r2 upstream dc/dc converter sw in fb parallel devices part number description comments lt1761 100ma, low noise ldo 300mv dropout voltage, low noise: 20v rms , v in = 1.8v to 20v, tsot-23 package lt1763 500ma, low noise ldo 300mv dropout voltage, low noise: 20v rms , v in = 1.8v to 20v, 4mm 3mm dfn and so-8 packages lt3042 200ma , ultralow noise and ultrahigh psrr ldo 0.8v rms noise and 79db psrr at 1mhz, v in = 1.8v to 20v, 350mv dropout voltage, programmable current limit and power good, 3mm 3mm dfn and msop packages lt3045 500ma , ultralow noise and ultrahigh psrr ldo 0.8v rms noise and 76db psrr at 1mhz, v in = 1.8v to 20v, 260mv dropout voltage, programmable current limit and power good, 3mm 3mm dfn and msop packages lt3065 500ma low noise ldo with soft-start 300mv dropout v oltage, low noise: 25v rms , v in = 1.8v to 45v, 3mm 3mm dfn and msop packages LT3080 1.1a , parallelable, low noise, low dropout linear regulator 300mv dropout voltage (2-supply operation), low noise: 40v rms , v in : 1.2v to 36v, v out : 0v to 35.7v, current-based reference with 1-resistor v out set; directly parallelable (no op amp required), stable with ceramic capacitors; to-220, dd-pak, sot-223, msop and 3mm 3mm dfn-8 packages; LT3080-1 version has integrated internal ballast resistor lt3085 500ma , parallelable, low noise, low dropout linear regulator 275mv dropout (2-supply operation), low noise: 40v rms , v in : 1.2v to 36v, v out : 0v to 35.7v, current-based reference with 1-resistor v out set, directly parallelable (no op amp required), stable with ceramic capacitors; ms8e and 2mm 3mm dfn-6 packages lt3045-1 30451fa

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